As semiconductor devices are refined more highly, their metal interconnect decreases in its width and height. This causes a problem that the interconnect width and height get closer to the mean free path of conduction electrons and an interface inelastic scattering effect increases electrical resistivity. In particular, if the interconnect width and height are almost equal to or not greater than the mean free path, the interface inelastic scattering effect increases electrical resistivity more greatly. To prevent the electrical resistivity from increasing, it is proposed to use graphene interconnect that is less influenced by the interface inelastic scattering effect.
However, when the interconnect length is shorter than the ballistic conduction length, the resistance of the graphene interconnect is higher than that of the metal interconnect. It is thus inexpedient to use graphene interconnect for all the interconnect.
Therefore, a structure and a method capable of forming low-resistance interconnect even though the interconnect width and height are decreased, is desired.
It is considered that graphene is formed by supplying carbon to the facet of an underlying layer. Since, however, the location or shape of the facet is not sufficiently controlled, there is a problem that a good-quality, uniform graphene layer is not formed.
Therefore, a structure and a method capable of forming a good-quality, uniform graphene layer have been desired.